Verilog Digital Computer Design : Algorithms into Hardware

Customers who bought this book also bought:

Verilog HDL Synthesis, A Practical Primer; J. Bhasker
Verilog Hdl : A Guide to Digital Design and Synthesis; Samir Palnitkar
A Verilog HDL Primer; J Bhasker
The Verilog Hardware Description Language; Philip R. Moorby, Donald E. Thomas

Reviews
From the Back Cover
Verilog Digital Computer Design: Algorithms to Hardware
Shorten time to market with Verilog HDL
Real-world Verilog design, start-to-finish
The most productive way to design complex digital and computer systems is to understand them as algorithms and code them in implicit style Verilog, using Verilog's non-blocking assignment features. In this book, award-winning Verilog expert Mark Gord on Arnold shows how, introducing a top-down approach that leverages the ASM charts most digital designers are already familiar with. Throughout, you'll learn practical techniques that enable earlier debugging, automatic conversion of source code into hardware, and shorter time to market.

*Understand the fundamental goals, structure and behavior of Verilog.

*Discover how to use ASMs as the “master plan” for digital design.

*Walk through the three stages of Verilog design: behavioral, mixed and structural.

*Learn Verilog simulation techniques for Mealy machines and bottom-testing loops.

*Use Verilog gate level techniques to model propagation delay.

*Leverage special-purpose design techniques to build general-purpose processors.

Arnold demonstrates a powerful new approach that automatically synthesizes a one-hot design directly from implicit style Verilog. He also introduces the elegant ARM instruction set as a way of exploring RISC design with implicit Verilog and ASMs. From start to finish, Verilog Digital Computer Design: Algorithms to Hardware is more than a great guide to Verilog: it's a primer on the enduring concepts of computer design that will apply no matter which tools you choose.

About the Author
About the Author
MARK GORDON ARNOLD has taught Verilog at the University of Wyoming in Laramie, Wyoming since 1993, and is co-author of several papers on Verilog computer design, including “A Synthesis Preprocessor That Converts Implicit Style Verilog Into One-Hot De signs,” winner of the Best Paper Award at the 1997 International Verilog Conference. Arnold holds three patents.

Back to General
Back to Algorithms
Back to Main Index