Reviews Book Description A thorough presentation of the architecture, hardware design and performance of scalable shared-memory multiprocessors. This emerging class of computers combines the computational power found in large-scale multicomputers with the ease of programming found in traditional small-scale shared-memory processors.
The authors draw from their experience with the DASH prototype to design a detailed case study of the first operational machine to include a scalable cache-coherence mechanism. This book will appeal to practitioners involved with the design of commercial systems who are looking to move beyond today's bus-based architectures, and to researchers studying parallel architecture.
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